Most embedded systems use hardware diagnostics to keep track of their hardware’s health. Diagnostics might also be utilized to validate an issue that was discovered during routine operations. Faststream provides a number of diagnostic tests, including Power On Self Tests (POST), Out of Service Tests, and In-Service Monitoring.

Power On Self Tests

Power-on self-tests are performed immediately after a board is turned on. The code for these tests is usually found in the EPROM that boots the card. These checks are run automatically when the EPROM boots. The biggest drawback of these tests is that they can only test the card’s internal functionality. Where external interface logic cannot be examined, Power On Self Tests performs diagnostics on hardware parts.

CPU and Register Test

This is the first, and it examines the CPU’s internal state. This test is carried out by running CPU instructions and then checking their outcome. This test also puts all of the processor’s registers to the test. As part of this test, data in a register may be shifted by one bit, and the result of the shift operation will be compared to a previously computed value.

EPROM Checksum Test

When an EPROM is programmed, the last two bytes are set to zero on purpose. The EPROM programmer fuses the checksum’s final two bytes together. This test calculates the EPROM checksum by computing a 16-bit exclusive OR (XOR) of the EPROM data, omitting the final two bytes. After that, the computed checksum is compared to the checksum fused in the final two bytes. If the calculated and fused checksums match, the test is passed.

RAM March Test

The read-write memory integrity is assessed using the issues described below.

Address Line Faults: For whatever reason, the address lines on the board or within the memory chip may be shorted or set to 0 or 1. When memory is written in either scenario, several locations or an erroneous place may be written. Data corruption may occur when two distinct places in the memory output data on the data bus during a read.

Data Line Faults: It’s possible that data wires are shorting one another. Alternatively, they might be limited to a range of 0 to 1. As a result of this circumstance, incorrect data will be written to or read from the memory.

Data Loss: When data is written to a certain place, it may be OK when to read shortly after it is written. However, it will be gone within a short time. The address and data lines are in good shape, but the memory cells become corrupted with time.

Memory testing procedures may be somewhat intricate, and the methodology utilized is also dependent on the memory banks’ arrangement. We’ll go through a basic test that covers all of the above-mentioned fault situations quite well. This test involves the stages listed below.

Initializing: Write a zero in every memory region on the board.

Marching Ones: Repeat the procedures below, starting with the lowest address and working your way up to the highest address.

• Check to see if the content of the memory is 0
• In the bit 0 positions, write a 1
• Check the memory location to see if the bit was successfully written
• Rep the procedures above until you’ve written a 1 in every piece of that area

Marching Zeros: Repeat the procedures below, starting with the highest address and working your way down to the lowest address.

• Check to see if the content of the memory is 0xFF
• In the bit 0 positions, write a zero
• Check the memory location to see if the bit was successfully written
• Repeat the procedures above until all bits of that position have been written with a zero

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